Sony has developed techniques to produce nanometer-sized next generation functional devices such as resistors, switches, and transistors using metallic carbon nanotubes as wires. U.S. Patent 7,642,541, FIG. 6A shows a scanning electron microscope photograph of two metallic carbon nanotube wires in a nano-switch developed by Sony scientists. The gap between the two wires is about 20 nanometers.
The metallic carbon nanotube is obtained by applying the AC voltage of 1 V with frequency of 1 MHz for 30 sec, and then evaporating DMF as a solvent, and orienting the metallic carbon nanotube to bridge the clearance between the electrode and the electrode as opposed electrodes.The International Technology Roadmap for Semiconductor (ITRS) of the semiconductor industry for next 15 years, which has been announced by Semiconductor Industry Association (SIA), expresses that Moore's Law will remain in effect.
ITRS includes a short-term roadmap till 2007 and a long-term roadmap till 2016. The short-term roadmap describes that the half pitch of a DRAM (dynamic RAM) of a semiconductor chip would become 65 nm in 2007 as it did. The long-term roadmap describes that the half pitch will become 22 nm in 2016. Intel introduced 32 nm processors on January 7th, 2009.
The finer the semiconductor chip becomes, the faster it performs and the smaller the electric consumption becomes. Further, when the semiconductor chip becomes finer, the number of products produced by one wafer increases and the production cost can be lowered. That is why microprocessor manufacturers compete with each other in the process rule of new products and the integration degree of transistors. It also drives competition to create new materials and new nano-scale manufacturing processes.
The Roadmap indicates that "Moore's Law" will reach the limit based on the natural laws in the near future. Carbon nanotubes are seen as a material that will allow Moore’s Law to continue in the near term and semiconductor manufacturers are racing to develop carbon nanotube devices.
ITRS includes a short-term roadmap till 2007 and a long-term roadmap till 2016. The short-term roadmap describes that the half pitch of a DRAM (dynamic RAM) of a semiconductor chip would become 65 nm in 2007 as it did. The long-term roadmap describes that the half pitch will become 22 nm in 2016. Intel introduced 32 nm processors on January 7th, 2009.
The finer the semiconductor chip becomes, the faster it performs and the smaller the electric consumption becomes. Further, when the semiconductor chip becomes finer, the number of products produced by one wafer increases and the production cost can be lowered. That is why microprocessor manufacturers compete with each other in the process rule of new products and the integration degree of transistors. It also drives competition to create new materials and new nano-scale manufacturing processes.
The Roadmap indicates that "Moore's Law" will reach the limit based on the natural laws in the near future. Carbon nanotubes are seen as a material that will allow Moore’s Law to continue in the near term and semiconductor manufacturers are racing to develop carbon nanotube devices.
Nano-scale resistors, switches and transistors made with metallic carbon nanotube wire wiring and the needed nanofabrication methods earned Sony Corporation (Tokyo, JP) and Sony Deutschland GmbH (Berlin, DE) U.S. Patent 7,642,541 on January 5th 2009.
The nanometer-sized functional structures include a wiring means capable of reducing connection resistance in connecting the functional structure to an external electrode and of minimizing restrictions on structural designs of various functional structures, and the needed nanofabrication methods were developed by inventors Eriko Matsui, William Ford, Jurina Wessels. Akio Yasuda, Ryuichiro Maruyama and Tsuyonobu Hatazawa. Patterning is provided by photolithography.
FIG. 1A is a plan view and FIG. 1B is a cross section showing an example of a functional device according to the invention. FIG. 1B is a cross section taken along line 1b-1b of FIG. 1A. A partial enlarged view of a region indicated by dotted line is additionally shown in the lower part of FIG. 1B.
First, one carbon nanotube (not shown) is arranged so that the carbon nanotube contacts with the electrode 3 and the electrode 4 and bridges a clearance between the electrodes 3 and 4. The carbon nanotubes 6 and 7 are produced by forming a gap 8 to segment the carbon nanotube into two sections. In FIG. 1B, a case that the carbon nanotube 6 and the carbon nanotube 7 are completely segmented is shown. However, it is possible that a wall face of the carbon nanotube slightly remains in the gap 8, and the carbon nanotube 6 and the carbon nanotube 7 are connected to each other with the wall face in between.
As shown in the partial enlarged view in FIG. 1B, the functional structure 9 includes one contained section 9a, a conductive linkage group 9b, a functional structural part 9c, a conductive linkage group 9d, and the other contained section 9e. The one contained section 9a is contained in the carbon nanotube 6 at an opening of the carbon nanotube 6 facing the gap 8. The other contained section 9e is contained in the carbon nanotube 7 at an opening of the carbon nanotube 7 facing the gap 8. In the result, the functional structure 9 is provided between the carbon nanotube 6 and the carbon nanotube 7
FIG. 2 is a cross section showing an example of a functional device structured as a switch. The functional structural part 9c is not particularly limited. For structuring a resistive element which is a passive device, the functional structural part 9c is preferably a fine particle of a metal or a semiconductor. For structuring an active device such as a device having a switching function to turn on/off a current, a molecular device having a function to turn on/off a current by action of electric field as shown in FIG. 2 as a model or the like is preferable. 9a and 9e are fullerene molecules.
It is needless to say that carbon nanotube orientation is not established without application of electric field. When a D.C. current is applied, it is not possible to orient the metallic carbon nanotube between the electrodes.
FIG. 6B shows a scanning electron microscope photograph of the metallic carbon nanotube. In the metallic carbon nanotube, the gap 18 is formed by applying the AC voltage of 5 V with frequency of 100 Hz to burn off part of the metallic carbon nanotube. It is publicly known that the gap can be formed by applying a voltage to flow a current to the metallic carbon nanotube. The inventors have repeated experiments under various conditions, and have clarified that a given size of the gap can be formed in the oriented metallic carbon nanotube.
As a method of forming the gap (nano gap) 18, involves burning off part of the metallic carbon nanotube by a current. However, the method is not limited thereto, and the gap can be formed by microfabrication by using, for example, an atom force microscope (AFM) or the like.
