Today's computer devices often include auxiliary memory storage devices having media on which data can be written and from which data can be read for later use. A direct access storage device (disk drive) incorporating rotating magnetic disks are commonly used for storing data in magnetic form on the disk surfaces. Data is recorded on concentric, radially spaced tracks on the disk surfaces. Magnetic heads which include read sensors are then used to read data from the tracks on the disk surfaces.
In U.S. Patent 7,646,570, Hitachi Global Storage Technologies Netherlands B.V. (Amsterdam, NL) discloses a nanofabrication process for current-perpendicular-to-plane (CPP) read sensors with constrained current paths made of lithographically-defined conductive vias with surrounding oxidized metal sublayers. The resulting conductive vias may be within 3 and 40 nanometers (nm).
Advantageously, according to inventors Hardayal Singh Gill, Jordan Asher Katine, Alexander Zeltser, the lithographically-defined conductive vias increase the current density of the read sensor in the region of the sensing layers to thereby simultaneously increase its resistance and magnetoresistance. With use of the process of oxidation, nitridation, or oxynitridation on each metal sublayer, degradation of the spacer layer is reduced or eliminated such that the desirable soft magnetics of the free layer in the read sensor are maintained.
The nanofabrication process involves forming a tantalum (Ta) metal sublayer which is then deposited over and adjacent the spacer layer, followed by one of an oxidation process, a nitridation process, and an oxynitridation process, to produce a tantalum oxide (TaOx) insulator from the metal sublayer. The metal sublayer deposition and oxidation/nitridation/oxynitridation processes are repeated as necessary to form the insulator with a suitable thickness.
Next, a resist structure which exposes one or more portions of the insulator is formed over the insulator. With the resist structure in place, exposed insulator materials are removed by etching to form one or more apertures through the insulator down to the spacer layer. Electrically conductive materials are subsequently deposited within the one or more apertures to form one or more lithographically-defined conductive vias of a current-constraining structure.
Advantageously, the lithographically-defined conductive vias increase the current density of the read sensor in the region of the sensing layers to thereby simultaneously increase its resistance and magnetoresistance. With use of the process of oxidation, nitridation, or oxynitridation on each metal sublayer, degradation of the spacer layer is reduced or eliminated such that the desirable soft magnetics of the sensing layers in the read sensor are maintained.
FIG. 10 is a flowchart which describes a Hitachi Global fabrication process for a CPP sensor having constrained current paths made of lithographically-defined conductive vias.
Semiconductor and electronics manufacturers spent roughly $80 billion in 2007 and $74 billion in 2008 for silicon wafers, materials and equipment which allowed them to manufacture integrated circuits at scales to 45nm, and they are now beginning to buy equipment to manufacture integrated circuits at the scales of 32nm and 22nm.
The overall market for wafers and nanofabrication equipment is expected to grow at nearly 10% a year for the next five years and grow from an estimated $65.8 billion in 2009 to $105.6 billion in 2014 according to according to Nanolithography Equipment for IT, Electronics and Photonics - A Technology, Industry and Global Market Analysis
