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Showing posts with label nanoelectronic devices. Show all posts
Showing posts with label nanoelectronic devices. Show all posts

Researchers Introduce Ionic Bombardment Method to Grow Carbon Nanotubes on a Catalytic Base


Researchers at Iran’s Plasma Physics Research Centre of Islamic Azad University have developed an improved method to synthesize and grow carbon nanotubes. The new ion energy method can produce the nanotubes that have applications in manufacturing electron emitters and solid devices with high thermal conductivity.

Since the 1991 discovery of carbon nanotubes, researchers have  attempted to optimize carbon nanotube production to lower their cost and increase their application in different industries.

Majid Mojtahedzadeh Larijani, one of the researchers, undertook this study with the aim of “Introducing a novel method for carbon nanotubes' growth especially on substrate beds with a catalytic base by means of ionic bombardment."

"The bed used in this study was steel. First in the process, sub-layer underwent surface treatment by argon ionic bombardment of the surface at different ion energies and doses. Then, carbon nanotube growth on bombarded samples using hydrogen and steel gases was accomplished by TCVD method and finally samples were analyzed by TEM, SEM, AFM, and Raman spectroscopy devices," Mojtahedzadeh told the Iran Nanotechnology Initiative Council (INIC) news service  in an interview.

The results showed that ion energy and dose in which sub-layer surface turns into fine grains are very appropriate for the growth of dense and adhesive carbon nanotubes. “These nanotubes could be applied for manufacturing electron emitters and solid devices with high thermal conductivity in electronics industry,” according to Mojtahedzadeh.

The details of the present study are available at Surface & Coatings Technology, volume 203, pages 2510 to 2513, 2009.

Hewlett Packard Reveals Nanoimprint Lithography for Nanophotonic Devices


Hewlett-Packard Company inventors Zhiyong Li and R. Stanley developed nanoimprint lithography methods to manufacture photonic devices and nano-structures which are detailed in U.S. Patent Application 20090274874.  The photonic device includes a substrate and at least one molecularly assembled or atomic layer deposited nano-structure defined on the substrate. The nano-structure has a controlled resolution from 100 nanometers to 10 nanometers  or smaller.  HP nanoimprint lithography may be used to manufacture photonic devices, nanoelectronic devices, nanoplasmonic devices, or enhanced Raman spectroscopy devices.

Nano-imprint lithography was initiated as a process to achieve nanoscale features (about 100 nm or smaller) with high throughput and relatively low cost in structures such as molecular electronic devices. During many imprinting processes, the nanoscale features are transferred from a mold to a polymer layer. As non-limiting examples, the mold may be used for a thermal imprint process, as well as for a UV-based imprint process.

In the thermal imprint process, to deform the shape of the polymer, the temperature of the film and mold is generally higher than the glass transition temperature of the polymer, so that the polymer flows more easily to conform to the shape of the mold. Hydrostatic pressure may be used to press the mold into the polymer film, thus forming a replica of the mold in the polymer layer. The press is then cooled below the glass transition temperature to "freeze" the polymer and form a more rigid copy of the features in the mold. The mold is then removed from the substrate.

In the alternate UV imprint process, a UV-curable monomer solution is used instead of a thermoplastic polymer. The monomer layer is formed between the mold and the substrate. When exposed to a UV light, the monomer layer is polymerized to form a film with the desired patterns thereon.

Embodiments of the method advantageously enable control over the formation and resolution of nano-structures at or below 100 nm. Without being bound to any theory, it is believed that the removal of a polymeric resist from the process advantageously contributes to the ability to control the resolution on the sub-100 nm scale. The use of polymeric resists during nano-imprinting may deleteriously affect feature resolution at or below 100 nm (especially at or below 10 nm), in part, because of the proximity effect from the scattering of electrons or ions in the polymeric resist (e.g., during electron beam (e-beam) lithography).

 In some instances, the desirable critical dimension (e.g., at or below 10 nm or at or below 30 nm) of the nanostructure is comparable with the molecule size of the polymeric resist, as such, it may be difficult to achieve uniformity and resolution at the critical dimension. It is further believed that the mechanical strength of polymer resists prevents the formation of a nanoscale pattern with a desirable aspect ratio that is capable of surviving liftoff or etching processes. Still further, techniques such as e-beam lithography, UV lithography, or X-ray lithography may result in significant edge roughness on the patterned polymeric resist, which may be problematic when the patterned features are at or below 30 nm. The method(s) utilize guided molecular assembly or atomic layer deposition, both of which eliminate the use of polymeric resists and enhance feature precision control.

FIG. 1 depicts an embodiment of the method for forming nano-structures. Generally, the method includes establishing a mold having nano-features in contact with a substrate, thereby forming at least one of a channel or a semi-channel, wherein the channel and/or semi-channel is defined at least by an exposed surface of the substrate, an exposed surface of the mold, and a side surface of an adjacent nano-feature of the mold, the nano-features of the mold having a releasing material established thereon, as shown at reference numeral 100; exposing the channel and/or semi-channel to vapor phase assembly or atomic layer deposition to form a layer having a predetermined thickness within the channel, as shown at reference numeral 102; and releasing the mold from the substrate, as shown at reference numeral 104. 

The method shown in FIG. 1 is further described in reference to FIGS. 2A through 2F. More specifically, FIGS. 2A through 2D together depict one embodiment of the method for forming the nano-structures, and FIGS. 2A through 2C, 2E and 2F together depict another embodiment of the method for forming the nano-structures. As such, FIG. 2D depicts one embodiment of the resulting structure 10, and FIG. 2F depicts another embodiment of the resulting structure 10'. Such structures 10, 10' may advantageously be used as or in photonic devices, nanoelectronic devices, nanoplasmonic devices, or enhanced Raman spectroscopy devices.















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