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ASML & STMicroelectronics to Accelerate 28-nm and 22-nm Node Breakthroughs with SOLID Project

ASML (Veldhoven, the Netherlands) along with its subsidiary Brion Technologies, have announced a broad-scoped joint development project with STMicroelectronics (ST) to accelerate 28-nm node deployment and 22-nm node development.

This joint development project, code-named SOLID (Silicon printing Optimization with Lithography control and Integrated Design), seeks to optimize the patterning process from design to manufacturing, extend characterization tools and methods to develop new correction/compensation techniques for reducing variability and explore breakthrough lithography solutions for manufacturing complex chips at sub-30-nm nodes.

ST will work with TachyonTM SMO source-mask co-optimization in tandem with ASML's advanced illumination sources, including the recently announced FlexRayTM programmable illuminator. Together Tachyon SMO and FlexRay will provide ST faster development cycles in R&D and faster ramp to production. Till now, ST has successfully used Brion's Tachyon OPC+ optical proximity correction and LMC lithography manufacturability check in its 45-nm production.

"This joint development project combined with ASML's integrated suite of lithography products, including Brion computational solutions and the latest generation of TWINSCAN NXT scanner provides ST with computational and wafer lithography technologies that will enable us to develop optimum manufacturing solutions at 28-nm and below," said Joël Hartmann, Silicon Technology Development Director for STMicroelectronics, at Crolles, France. "Furthermore this ST-ASML effort is a reinforcement of the Crolles cooperative R&D cluster, which gathers partners around the development and enabling of low-power SoC (System on Chip) and value-added application-specific technologies. This is a perfect example of a project developed within the framework of the Nano2012 program."

The Nano 2012 program is a cooperation between IBM Fishkill and Albany (NY State), STMicroelectronics and CEA-LETI and focuses on nanoelectronics which aims to boost the technological lead and competitive position of the Grenoble area in the changing conditions of the global semiconductor industry and consolidate its leadership position in the development of (32 and 22 nm) CMOS technologies and derivative technologies for system-on-chips (embedded memory, analog/RF devices, etc.). Over the next five years Nano 2012 will be allocated a $3.3 billion (€2.3B) R&D budget with a further  $1.82 billion (€1.25B) for capital investment, making it one of France’s biggest industrial projects. National and local government are providing substantial support for the project, contributing some $667 million (€457M). Realization of this project will make Grenoble- Isere a global centre for tomorrow’s nanoelectronics, with potential for creating about 650 jobs in the Grenoble area. In just 10 years more than $8.7 billion (€6B) will have been invested in micro and nano-electronics in Grenoble-Isere. 
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